Selecting Functional Test Sequences for Defect Diagnosis
Irith Pomeranz · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018
A simulation-based design verification process creates a large pool of functional test sequences. Such sequences have several advantages when they are used as manufacturing tests and for defect diagnosis. This brief considers the problem of selecting functional test sequences from a given pool when the goal is to use the sequences for defect diagnosis. The procedure described in this brief relies on the defect diagnosis of faulty units for the selection of sequences. Experimental results for simulated faulty units based on benchmark circuits demonstrate the possibility of learning from a limited set of faulty units which sequences from a given pool are effective for defect diagnosis.