REMARC : Reconfigurable Multimedia Array Coprocessor
Takashi Miyamori, Kunle Olukotun · 1999
This paper describes a new reconfigurable processor architecture called REMARC (Reconfigurable Multimedia Array Coprocessor). REMARC is a reconfigurable coprocessor that is tightly coupled to a main RISC processor and consists of a global control unit and 64 programmable logic blocks called nano processors. REMARC is designed to accelerate multimedia applications, such as video compression, decompression, and image processing. These applications typically use 8bit or 16-bit data therefore, each nano processor has a 16-bit datapath that is much wider than those of other reconfigurable coprocessors. We have developed a programming environment for REMARC and several realistic application programs, DES encryption, MPEG-2 decoding, and MPEG-2 encoding. REMARC achieves speedups ranging from a factor of 2.3 to 21.2 on these applications. 1 Introduction As the demand for multimedia applications, such as video compression, decompression, and image processing, increasing the performance of thes...