Transform Decoding of Reed-Solomon Codes. Volume II. Logical Design and Implementation.
B. L. Johnson, A. L. Bequillard, S. J. Meehan · 1982
This report describes the logic design and hardware implementation of an encoder and decoder for a large number of Reed-Solomon symbol error-correction codes. The logic implements a transform encoding and decoding algorithm that was previously described in Volume One. The hardware required to implement the critical steps in the encoding and decoding algorithm is described in depth. An analysis of the decoder's operational characteristics and hardware complexity is presented. A proof-of-concept breadboard configured with small-scale Schottky TTL components is also described.