Power Efficient Carry Select Adder using 4T XNOR Gate
Mr. Sai Sandeep · International Journal for Research in Applied Science and Engineering Technology · 2018
Adders are the basic elements used in complex data processing for efficient VLSI design. The Carry select adder circuit is used for the design of high speed processors. There is scope for decreasing the power consumption of the design while preserving the speed of the circuit in CMOS technology. In this paper 4transistor XNOR gate is used to design the hybrid CMOS Full Adder circuit. The CSA circuit is designed using this hybrid CMOS Full Adder circuit for 8-bit.In this paper the carry select adder is designed through 130nm CMOS process technology and implemented using Mentor Graphics tool.