High speed architecture for orthogonal code convolution
Sudhakar Ajmera, Mahendra Vucha, Aruna Kokkula · 2017
The orthogonal code is one of the error correction and detection codes and it can detect errors and correct corrupted data. An n-bit orthogonal code would haven/2 1's and n/2 0's and these properties can effectively participate in detecting and correcting the errors. Thus this article presents a new methodology to enable error detection capabilities using the orthogonal code. The orthogonal codes has been verified experimentally and proved their physical reliability by implementing on Field Programmable Gate Arrays (FPGA). The experimental results shows that the proposed orthogonal code can improve the detection capabilities of the transmitted information up to 99.9% and also it corrects errors up to (n/2 - 1) bits in the received information with bandwidth efficiency.