Energy efficient and side-channel secure hardware architecture for lightweight cipher SIMON
Arvind Singh, Nikhil Chawla, Monodeep Kar, Saibal Mukhopadhyay · 2018
Design of ultra-lightweight but secure encryption engine is a key challenge for Internet-of-Things (IOT) edge devices. We explore the architectural design space for datapath of 128-bit SIMON, a lightweight block cipher, to simultaneously increase energy-efficiency and resistance to power based side-channel analysis (PSCA) attacks. Alternative datapath architectures are implemented on FPGA (Spartan-6, 45nm) to perform power, performance and area (PPA)) analysis. We show that, although a bit-serial datapath minimizes area and power, a round unrolled datapath provides 919× higher energy-efficiency and 210× higher performance, compared to the baseline bitserial design. Moreover, the PSCA measurements demonstrate that a 6-round unrolled datapath improves minimum-traces-to-disclosure (MTD) for correlation power analysis (CPA) by at least 384× over baseline bitserial design with no successful CPA even with 500,000 measurements.