SW-AES: Accelerating AES Algorithm on the Sunway TaihuLight
Liandeng Li, Jiarui Fang, Jinlei Jiang, Lin Gan, Weijie Zheng, Haohuan Fu, Guangwen Yang · 2017
The Advanced Encryption Standard (AES) is a widely-used efficient cryptographic algorithm. Although AES is fast both in software and hardware, it is time-consuming to do data encryption especially for large amount of data. Therefore, it is a lasting effort to accelerate AES algorithms. This paper presents SW-AES, a parallel AES implementation on the Sunway TaihuLight, the fastest supercomputer in the world that takes the SW26010 many-core processor as the basic building block. According to the architectural features of SW26010, SW-AES exploits parallelism from different levels, including 1) inter-CPE (Compute-Processing Element) paral- lelism that distributes tasks among the 256 on-chip CPEs, 2) intra-CPE data parallelism enabled by the Single-Instruction Multiple-Data (SIMD) instructions inside each CPE, and 3) instruction-level parallelism that pipelines memory access and the computation. As a result, SW-AES can gain a maximum throughput of 13.49 GB/s on a single SW26010 node, which is 210.78 × higher than the latest parallel AES implementation on the Sunway TaihuLight, and about 37.3% higher than the latest AES implementation on the GTX 480 GPU.