Delay, Power performance of 8-Bit ALU Using Carry Look-Ahead Adder with High Vt Cell
Bhukya Shankar · International Journal for Research in Applied Science and Engineering Technology · 2018
A Low power 8-bit Arithmetic Logic unit (ALU) using a Carry look-ahead adder (CLA) and placing High V t (HV t ) cells in Critical path is anticipated. The ALU is designed in 45nm CMOS technology. ALU is a most essential circuit in any processor. It consists of AE, LE, CLA and CE. This ALU is designed to calculate Arithmetic and Logical operations. Power and Delay values of different 8-bit adders like CLA, Sparse and Ripple-carry adder (RCA) are designed and compared. The simulation results show that the design of ALU using CLA and implementing High V t and Standard V t cells in the CLA gives more power and delay efficient than with only Standard threshold voltage cells.