Research and Design of AES Security Processor Model Based on FPGA
Pu Wang, Yuming Zhang, Jun Yang · Procedia Computer Science · 2018
The rapid development of information technology and how to ensure the safe transmission of information have always been a hot topic in the field of computer security. AES is the most mainstream and common encryption standard in the 21st century, with the advantages of high efficiency, good stability and flexibility. Taking information encryption as the background and FPGA design as the foundation, this paper realizes the security processor model based on advanced encryption algorithm AES, and to improve the way of collaboration between modules, especially encryption module and key extension module, making full use of the parallel and water technology to enhance the system run speed, through the design of the hardware that allows the encryption system to achieve more efficient and more stable level of security. The system has the advantages of simple circuit structure and low occupancy resources so it can be very practical.