ID Card Detection
Rahul Saha, Debashree Kalita, Aditya Vashishtha, M. Azhagiri · 2018
Abstract— The paper describes detection of an image of 64x 128 pixel. An optimized algorithm is proposed based on conventional Histograms of Oriented Gradient descriptor and Support Vector Machine classifier algorithms for hardware implementation. By implementing the proposed algorithm on a field-programmable gate array (FPGA) of a high-speed vision platform, multi- object in an image can be detected at 12,000 fps under complex background. In hardware implementation, 64 pixels were processed in parallel with 80 MHz camera clock. The source image and detection results can be moved to desktops or laptops in real-time for recording or further processing.