Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis
Pietro Fezzardi, Fabrizio Ferrandi, Christian Pilato · IEEE Design and Test · 2018
This article presents an automated approach for detecting system- level bugs in SoC designs that are composed of many IP blocks, without exposing sensitive information. The approach leverages high-level synthesis techniques.—Binoy Ravindran, Virginia Tech