A Review Paper on Multiplier Algorithms for VLSI Technology
Agrawal, Kajal, Milind Shah, Gaurav Asari · Zenodo (CERN European Organization for Nuclear Research) · 2018
In the era of digitalization, it is required to increase the speed of digital circuits while reducing area and power consumption. In any digital system, multiplication is a key element. One of the important parameter which affects the performance of entire system is performance of multiplier unit. Therefore, it is required to design efficient multiplier unit. To improve the efficiency of multiplier unit, it's needed to optimize various parameters such as speed and area. There are different multiplier algorithms discussed and compared in this paper for performance optimization.