An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs
John Jose, Abhijit Das · 2018
With the ever increasing core counts in Chip Multi-Processors (CMPs), Network-on-Chip (NoC) has emerged as a preferred framework for communication among various chip components. Among other factors, energy efficiency and congestion management play a vital role in identifying an efficient NoC design. Thus, NoCs with side-buffered deflection routers have gained popularity; mainly because of their simplicity in router design, low energy consumption and better load balancing capacity. Standing on the shoulders of existing state of the art, this paper proposes ADIEU; An Adaptive Deflection Router With Dual Injection and Ejection Units. This router has dual injection units and a minimal set of side-buffers to make adaptive routing decisions. Experimental results on the proposed microarchitecture using both real and synthetic workloads shows reduced average latency, buffer occupancy and deflection rate of flits when compared with the existing side-buffered deflection routers without any change in the critical path delay.