An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function
Jiangyi Li, Teng Yang, Minhao Yang, Peter R. Kinget, Mingoo Seok · IEEE Journal of Solid-State Circuits · 2018
This paper presents a novel microprocessor-based system-on-chip (SoC) with the capability to transform SRAM in the instruction cache to an ambient temperature sensor and a physically unclonable function (PUF). For the transformation, we extend the original microprocessor without interlocked pipeline stages instruction set architecture and update SRAM peripheral circuits and pipeline control. All the changes are made minimally to reduce hardware overhead and the impact on the original microarchitecture. Compared to the conventional approach implementing dedicated hardware for low duty-cycle sensing and PUF, the proposed transformation approach saves ~9.8× silicon area while achieving the performance and robustness comparable to the state of the art in implementing those functions. The efficiency of the approach is verified with an SoC prototyped in a 65-nm CMOS.