DA-FTL: Dynamic associative flash translation layer
Peyman Forouhar, Farshad Ramezan Pour Safaei · 2017
Considering the increasing growth of technology, various components of a system are becoming more advanced day by day, and according to statistics and reports, the most advancement has been made in the field of processors. In spite of all these advancements, we can still observe that computer systems suffer a lot of delays and slowness and the only section which attracts the attention is the memory, especially the data storage section. In recent years, we have witnessed many nonvolatile memories, each of which has their own capabilities and drawbacks. However, the memory that dominated ultimately the competition in the market was the nonvolatile flash memory. Later, this kind of memory was used in storage systems, and the technology of solid-state drives emerged to replace the conventional hard disk drives. The emergence of this new technology has been associated with a lot of challenges. In some applications, such as laptops, the increased lifetime is not a major challenge, but in many applications which are based on MLC (Multi Level Cell) technology, the increased lifetime is a very important parameter. A lot of control algorithms have been provided in the flash translation layer (FTL) section of this storage system to avoid additional (write/erase) operations that cause the erosion and reduction of the lifetime of memory and to increase the efficiency and lifetime of memory blocks. In this paper, we present a new FTL that dynamically controls the associativity of update blocks with data blocks and reduces the cost of write and erase operations in the Full Merge operation. This solution ultimately increases the lifetime of the memory blocks.