A design of the ethernet firewall based on FPGA
Shunhao Lin, Ding Zhang, Yuqing Fu, Shuxian Wang · 2017
Aiming at the problems of IP address security, high latency and system dependency, this paper introduces the design of the Gigabit Ethernet firewall based on FPGA (Field-Programmable Gate Array). It implements functions by FPGA including to achieve the legitimacy of the network packet inspection and the internal network protection. FPGA also provides interfaces for ARM (Advanced RISC Machines), as a management server, building a LwIP (Light weight IP) protocol stack to achieve a white-listing configuration and monitoring. Finally, the experiments prove that the firewall can achieve the throughput of 950Mbps and the latency of 61.266us when it realizes the network data filtering and static NAPT (Network Address Port Translation).