A 90 MHz 16 Mbit system integrated memory with direct interface to CPU
Katsumi DOSAKA, Akira Yamazaki, Naoya Watanabe, H. Abe, Taichi Ogawa, K. Ishihara, Masaki Kumanoya · 2002
This paper describes a system integrated memory with direct interface to CPU which integrates an SRAM, a DRAM and control circuitry including a TAG. This system memory realizes a computer system without glue chips. Thus, this system memory brings a computer system which is low cost, low power and compact size with sufficient performance. The maximum operating frequency is 90 MHz and the operating current at cache hit is 156 mA.