Architecture Exploration for HLS-Oriented FPGA Debug Overlays
Al-Shahna Jamal, Jeffrey B. Goeders, Steven J. E. Wilton · 2018
High-Level Synthesis (HLS) promises improved designer productivity, but requires a debug ecosystem that allows designers to debug in the context of the original source code. Recent work has presented in-system debug frameworks where instrumentation added to the design collects trace data as the circuit runs, and a software tool that allows the user to replay the execution using the captured data. When searching for the root cause of a bug, the designer may need to modify the instrumentation to collect data from a new part of the design, requiring a lengthy recompile.