A 576k 3.5-ns access BiCMOS ECL static ram with array built-in self test
Henry A. Bonges, D. Adams, Andrew John Allen, R. Flaker, T. Frederick, L. Gilbert, K. Gray, Erik Hedberg, Tim Holman, G.M. Lattimore, D. Lavalette, Khanh-Loc Nguyen, A. Roberts · 1991
An experimental 576kBiCMOS ECL-compatible SRAM which achieves 3.5-ns access and cycle is presented. The SRAM is fully self-testanle using less than 1kon-chip logic to assist characterization, wafer test, and package test.