Application-specific processing using high-level synthesis for networks-on-chip
Jens Rettkowski, Diana Göhringer · 2017
The end of Dennard scaling led to the use of heterogeneous Multi-Processor Systems-on-Chip (MPSoCs). Heterogeneous MPSoCs provide a high efficiency in terms of energy and performance due to the fact that each processing element can be optimized for an application task. However, the evolution of MPSoCs shows a growing number of processing elements (PEs) which leads to tremendous communication costs tending to become the performance bottleneck. Networks-on-Chip (NoCs) are a promising and scalable intra-chip communication technology for MPSoCs. This paper presents a novel NoC architecture for FPGA-based MPSoCs that combines data transfers with application-specific processing by adding high-level synthesized processing units to routers of the NoC. The execution of application-specific operations during data exchange between PEs exploits efficiently the transmission time. Furthermore, the processing units can be programmed in C/C++ using high-level synthesis and accordingly they can be specifically optimized for an application. This approach enables that transferred data can be processed by a processing element such as a MicroBlaze processor before the transmission or by a router during the transmission. Moreover, the additional processing capabilities of the routers release computing resources of the PEs.