Formal modeling for consistency checking of signal transition graph
Kanut Boonroeangkaow, Arthit Thongtak, Wiwat Vatanawood · 2017
The behavior of asynchronous hardware system is crucial and practically assured using the formal verification techniques. A signal transition graph is one of the effective alternatives to represent the behavioral design of a huge asynchronous system. The design could be verified beforehand to assure several essential properties including its consistency property. In this paper, the formal modeling scheme of a signal transition graph is proposed along with the consistency property in term of the linear temporal formula. The target signal transition graph is written in Promela code and verified using SPIN model checker. The result shows that the method can verify consistency property automatically.