The implementation of a successive cancellation polar decoder on Xilinx System Generator
A. Çağrı Arlı, Ayse Colak, Orhan Gazi · 2017
Polar coding is the first kind of the capacity achieving codes which are defined for binary-input discrete memoryless channels initially. Parallel processing property of the FPGA allows to decode faster with a margin of complexity. Xilinx System Generator as a practical tool to construct decoding designs in shorter time is a fact. In this study, FPGA implementation of decoding polar codes through Xilinx System Generator is shown.