A 128Gb (MLC)/192Gb (TLC) single-gate vertical channel (SGVC) architecture 3D NAND using only 16 layers with robust read disturb, long-retention and excellent scaling capability
Hang-Ting Lue, Pei-Ying Penny Du, Wei-Chen Chen, Yung-Chun Lee, Tzu‐Hsuan Hsu, Teng-Hao Yeh, Kuo-Pin Chang, Chih-Chang Hsieh, Chia-Tze Huang, Guan-Ru Lee, Chih-Ping Chen, Chieh-Fang Chen, Chia-Jung Chiu, Y. J. Chen, W. P. Lu, Tahone Yang, Kuang‐Chao Chen, Chun-Hsiung Hung, Keh-Chung Wang, Chih-Yuan Lu · 2017
We have successfully developed a 128Gb MLC (or 192Gb TLC) 3D NAND Flash using 16-layer SGVC architecture. The produced memory density is 1.6 Gb/mm2for MLC or 2.4 Gb/mm2for TLC (including CMOS peripheral area, spared BL's and blocks). Such memory density is comparable to 48-layer 3D NAND using the popular gate-all-around (GAA) structures. SGVC has the important advantage of much smaller cell size and pitch scaling capability which allows very high-density memory at much lower stacking layer number. SGVC possesses very robust read disturb immunity (>120M read) and long-retention (> 40 years at room temperature) at fresh state that can suppress the very frequent wear-leveling and refresh operations needed for other 3D NAND Flash devices and is very suitable for read-intensive memory. With further stacking/scaling, it is possible to realize low-cost 1Tb single-chip solution at merely 48 layers.