Cross Clock Domain Signal Research Based on Dynamic Motivation Model
Shan Zhou, Tao Zhang, Yawen Yang · 2017
A novel approach is present to process the clock domain crossing (CDC) signals and verify the correctness of function when metastable state happens. In this paper, the classification standard of FPGA internal synchronous and asynchronous clock domain is introduced. Based on the vague thought of clock domain crossing performance, IP mode is used according to different categories. Meanwhile, dynamic motivation model is applied practically. According to the case study, the proposed approach has excellent performance in CDC design and verification.