Novel Offset Techniques for Improving Bitstring Quality of a Hardware-Embedded Delay PUF
Wenjie Che, Fareena Saqib, Jim Plusquellic · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018
Statistical properties including uniqueness, randomness, and reproducibility are commonly used as metrics for physical unclonable functions (PUFs). When PUFs are used in authentication protocols, the first two metrics are critically important to the overall security of the system. In this paper, we investigate the statistical qualities of bitstrings generated by a hardware-embedded delay PUF called HELP using hardware data collected from a set of 500 Xilinx Zynq FPGAs. HELP analyzes variations in path delays that occur within a hardware-implemented macro. Two novel techniques are proposed in which the verifier computes a set of offsets that are used to fine tune the token's digitized path delays as a means of maximizing entropy and reproducibility in the generated bitstrings. The offsets are derived from the enrollment data stored by the server in a secure database. A population-based offset method is proposed, which computes median values using data from multiple tokens. A second chip-specific technique is proposed, which fine tunes path delays using the stored enrollment data associated with the authenticating token. The analysis of FPGA data shows that the population-based offset method significantly improves entropy while the chip-specific technique, used alone or in combination with the population-based method, significantly improves reproducibility.