An on-line debug method for FPGAs
Yipeng Yuan, Zhihua Feng, Xuegong Zhou · 2017
Field Programmable Gate Array (FPGA) is a programmable logic device. Because of its flexibility, prototyping based on FPGA is commonly used to verify integrated circuits. The key challenge of this method is lack of observability during the debugging process. To enhance the observability of a circuit, a method based on embedded trace buffers can help to record internal signals [1][2][3]. However, it changes the circuit structure, which may spend much time in re-compiling the whole circuit. In this paper, we present an incremental routing method to observe the internal signals in a circuit. The routed result can be displayed graphically. Display function is present to help users to trace the internal signals. We also offer an incremental routing solution without re-compiling the whole circuits to connect the target signals and the chosen IO blocks. Compared with the methods in [1][2][3], it reduces the time of re-compiling and users can easily observe the target signals. In addition, it does not need the specific debugging circuit in an FPGA.