A novel design and analysis of reversible barallel shifter using new FF-gate
S. Ranjith, T. N. Ravi · 2017
The need for low power has gained attention towards lot of low power techniques from quantam physics the concept of reversible logic has evolved to reduce the power dissipiation. This paper deals with the design of 8 bit shift register using reversible logic. The existing system the implementation carring out using Fredkin gate Feynman gate. Our design using implementation 4 × 4 ff gate which reduces the gate count as well as the gorbadgeoutput. The proposed design shows better output performance and provides and low power consumption than the existing design.