Design of low power hamming code encoding, decoding and correcting circuits using reversible logic
V. Shiva Prasad Nayak, Chinthaparthi Madhulika, Uppugunduri Pravali · 2017
An ideal communication relies on error detection and correction techniques for faultless data transmission. Hamming code is widely known among those techniques for single bit error detection and correction capacity. Low power circuit design yields many favorable conditions like increased performance, system capacity, minimized cost etc. Reversible logic is an excellent approach to optimize heat dissipation and information loss. As hamming code is designed using irreversible logic gates, there is undesired power dissipation. So, to improvise this downside, this paper elucidates the design of low power hamming code using reversible logic gates which detects and corrects the error if any. The mathematical analysis of quantum cost calculation, garbage outputs, delay and power is presented in this paper. Finally, simulation results are attained by using cadence virtuoso. The power dissipation for the proposed design is 7.2μW when the power of individual components is added theoretically. The overall power of the circuit is 5.8μW.