An efficient HMAC processor based on the SHA-3 HASH function
Junhui Li, Liji Wu, Xiangmin Zhang · 2017
The Keyed-Hash Message Authentication Codes (HMAC) is a widely used method to ensure the integrity and authentication of data. In this paper an FPGA-based efficient processor of the Keyed-Hash Message Authentication Codes (HMAC) using the Secure Hash Algorithm3-224 (SHA3-224) is presented. Any length of message and key can be processed by this processer. To achieve the high throughput which can reach up to 2.3Gbps, some optimizations such as pre-process, key reusing and two SHA-3 cores cooperation are employed. As a result, this proposed HMAC processor is applicable for a wide range of performance-oriented security systems.