Platform Independent Data Transfer and Storage Exploration Illustrated on Parallel Cavity Detection Algorithm.
Koen Danckaert, Francky Catthoor, Hugo De Man · 1999
In embedded multi-media applications, power and memory size efficient solutions are needed within real-time constraints. Since a large part of the power, bus load and memory size in these systems is due to data storage and accesses, a methodology for optimizing these dominant costs is crucial. For parallel embedded systems, it is especially important to reduce the number of shared memory accesses (also for performance reasons), and to use the local memories of the processors as efficient as possible. We will show that an extensive Data Transfer and Storage Exploration (DTSE) stage has to be performed before the conventional task/data-level parallelization and ILP compilation stages in order to achieve efficient solutions in terms of power and memory size. We also show that this DTSE stage can be performed nearly independently from the target architecture. We will substantiate this claim on a cavity detection application for medical imaging.