A/MS benchmark circuits for comparing fault simulation, DFT, and test generation methods
Stephen Sunter, Peter Sarson · 2017
The ITC'97 analog and mixed-signal (A/MS) benchmark circuits have been available for two decades. This paper discusses why they were useful but not for comparing A/MS design-for-test (DFT) techniques, tests, or fault coverage. First, this paper discusses these and other benchmark circuits, and proposes objectives for better benchmark circuits. The paper then describes the first, publicly-available A/MS benchmark circuits that include realistic process models with corners, SPICE netlists for commonly used A/MS and digital cells, performance specifications, and testbenches. These facilitate publishable comparison of mixed-signal DFT, test, and fault simulation techniques to facilitate improvement for A/MS circuitry, hopefully faster than in the last two decades.