The Performance of Small Cache Memories in Minicomputer Systems with Several Processors
Axel Lehmann, Detlef Schmid · 1978
The evolution of the last years has shown that with improving technological possibilities, concepts of cache and hierarchical memories must be taken into consideration also for minicomputer systems [2, 8, 10]. As well-known, the system performance critically depends on placing the addressed data at the time of memory access in the cache, as the memory level being next to the processor. Therefore, size and structure of the cache, as well as the organizing strategies are of decisive importance [2, 3, 4, 7, 8].