Analysis of aes cryptosystem in the existence of hardware trojan
Surbhi Chhabra, Kusum Lata · 2017
Nowadays, most of the cipher cryptographic technologies target on designing the algorithms which oppose an analytical attack by another third party intellectual property (3PIP) having access to cipher-text. In this regard, the physical security of cryptographic devices needs an immediate attention. Currently, due to the distributed functionality of the Integrated Circuit (IC) manufacturing industry, Hardware Trojans (HT) have established a reasonable threat to both marketing as well as military sectors. There have been many reports of Trojans being inserted at the hardware level in both the sectors. By using the conventional testing methods, one cannot discover and distinguish HT; as a result, various specialized detection methods come to the top of this field. In this paper, the effectiveness of the Advanced Encryption Standard (AES) cryptography technique has been investigated after implementing it over a Basys 3 Xilinx Artix-7 FPGA board with series “XC7A35T-1CPG236C”. Moreover, it has been found that even after the insertion of the Register Transfer Level (RTL) based HT, the resource utilization is significantly less, as compared to other implemented crypto-frameworks which might not confirm the insertion of HT.