Area-efficient and high-throughput hardware implementations of TAV-128 hash function for resource-constrained IoT devices
Ramla Ijaz, Muhammad Adeel Pasha · 2017
As the Internet of Things (IoT) continues to grow, the need for lightweight cryptography intensifies. Research in this direction has presented us with novel encryption and hash algorithms that continue to decrease in circuit size at the cost of increase in execution time and relaxation in required security level. Perhaps the most resource constrained devices present in the IoT domain are RFID tags, which provide a maximum area of around 4000 GE (Gate Equivalent) for security purposes. We propose a hardware implementation of TAV-128, a hash algorithm, that can be used in these resource constrained devices. We show that it is comparable with current lightweight cryptography proposals. In addition, we perform the comparison of software implementation of TAV-128 with existing popular soft cryptographic algorithms and demonstrate that it is efficient in terms of execution time and code size as well.