A complete processor for SIFT feature matching in video sequences
John V. Vourvoulakis, John A. Kalomiros, John N. Lygouras · 2017
Efficient detection and reliable matching of image features constitute a fundamental task in computer vision. When real-time operation is required, the solution to this problem becomes a real challenge, because of increased processing requirements. Scale Invariant Feature Transform (SIFT) is considered as a stable and robust algorithm for the extraction of invariant features, however special hardware is required for high frame-rate applications, in order to overcome its computational complexity in real-time. In this paper, a complete processor for SIFT feature matching in video sequences is presented. It performs SIFT feature extraction and matching, as well as rejection of false correspondences using the random sample consensus (RANSAC) algorithm. The processor was evaluated using metrics like response, repeatability and recall. It was found that the proposed fixed-point hardware implementation has a comparable performance with software implementations of SIFT. The processor architecture can process more than 36 fps with resolution 640×480, when it is implemented in Cyclone IV FPGA technology.