Fast Angular Mode Decision Hardware Implementation of HEVC Intra Prediction

Jooyong Choi, Seungyong Park, Kwangki Ryoo · International Journal of Signal Processing Image Processing and Pattern Recognition · 2017

In this paper, we propose fast angular mode decision hardware implementation of HEVC intra prediction.Intra Prediction coding of HEVC is a method of predicting a current block not referring to the different image temporally (time) but uses the spatial information from the peripheral image to be currently encoded.The newly designed video coding standard HEVC supports block sizes from 64×64 to 4×4 and a total of 35 Intra prediction modes.While HEVC has a higher performance than H.264/AVC because it uses more prediction modes, there is a high amount of calculation and operational time.HEVC's implementation of selecting prediction mode of the encoding algorithm has a high amount of calculation and operational time for optimum prediction.Efficient Intra prediction mode is determined by the designed hardware HEVC encoder proposed in this paper employing an algorithm to efficiently select the Intra prediction modes to reduce computational time and hardware area.In this paper, we will determine the horizontal and vertical direction from two Angular modes one by one.In Angular prediction mode, an efficient hardware design was proposed to minimize the operational process in parallel by processing block sizes from 64×64 to 4×4.Angular mode is determined in parallel to all the blocks to reduce hardware area and minimized operation and calculation time significantly which is a problem with existing hardware.The proposed hardware architecture was designed using Verilog HDL, implemented on a 65 nm technology, synthesized with Synopsys design compiler.Synthesized gate count amounted to 14.9 K and the maximum operating frequency at 2 GHz.

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