Adiabatic implementation of reversible architecture
Anirban Chowdhury, Sandipta Mal, Shruti Goswami, Akash Mondal, Swapnadip De, Manash Chanda · 2017 Devices for Integrated Circuit (DevIC) · 2017
Reversible logic has gained significant attention in ultra-low power computing. Adiabatic implementation of reversible gate, i.e., TOFFOLI gate has been analyzed in depth in this paper. Energy efficient single sinusoidal source has ensured the correct operation in the proposed reversible adiabatic architectures. Single sinusoidal source minimizes the clocking overhead and also ensures minimal control overhead and higher energy efficiency. Power dissipation issue is addressed in depth here. Extensive simulations show that adiabatic reversible gates consume very less power compared to the conventional static CMOS architectures. Such an approach is efficacious for the design of ultra-low power VLSI circuits where speed is not a pivotal issue, like Internet of Things (IoT), sensor node designs and portable applications.