Vertical-Horizontal Binary Common Sub-Expression Elimination for Reconfigurable Transposed Form FIR Filter
M. Tirumala · International Journal for Research in Applied Science and Engineering Technology · 2017
The Power is the main challenging factor in very large scale integrated circuits. Transpose form fir filters produce better results compared to the direct form FIR filters for reconfigurable applications. In the existing method, the possibility of realization of FIR filter in transpose form configuration Using Common Sub expression Elimination was explored. . This paper explains comparison of two different architectures for low complexity FIR filters namely Constant shift method (CSM), programmable shift methods (PSM) and vertical-horizontal binary common sub-expression elimination (VHBCSE). The FIR filters can efficiently implemented by using constant multiplier architecture based on vertical -horizontal binary common subexpression elimination (VHBCSE) instead of common sub-expression elimination (CSE). This technique is capable of reducing the average probability of using the switching activity of the multiplier block adders compared to that of existing algorithm i.e., Binary Common sub-expression elimination (BCSE) algorithm.The filter architecture is capable of operating for word length filter coefficient without any overhead in the hardware circuitry.This VHBCSE produce the better power results.