State assignment of direct output synchronous FSMs using genetic algorithm
Tiago S. Curtinhas, Duarte L. Oliveira, Orlando Verducci Junior, Osamu Saotome · 2017
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the design of digital hardware and that can be implemented in Field Programmable Gate Arrays (FPGAs). A class little known and very interesting of SFSM in the FPGA platform is the SFSMs of direct output (SFSM_DO). These state machines use the output signals as state signals, thus allowing several advantages when compared to conventional SFSM classes. Of these advantages, we can mention: elimination of glitches in the output signals; reduction of the number of state variables; reduction in latency time. This paper proposes an algorithm for state assignment using a genetic algorithm that introduces a minimum number of state variables. The proposed method was applied in twelve known benchmarks and showed a significant average reduction of 145.0%, 70.0%, 47.1% and 67.1% in the number of state variables, number of products, number of literals and area (LUTs + FFs), respectively, when compared the one-hot encoding.