Design of ripple carry adder using CMOS output wired logic based majority gate
Mili Sarkar, Gouranga Sundar Taki, Prerna, Rimi Sengupta, Soham Nandi Ray · 2017
A new technique of Ripple carry adder using majority gate based CMOS output wired logic is implemented. The ripple carry adder consists of four Full adder blocks. The carry from each stage is fed to the next stage as carry input. The Sum and carry outputs are obtained using output wired CMOS logic based majority gate. The number of transistors used in the proposed circuit design is less as compared to the conventional ripple carry adder circuit. The major advantage is its less delay. The design has been verified using tanner tool.