Implementation of DTW algorithm for voice recognition using VHDL
Deependra Pandey, Kamlesh Kumar Singh · 2017 International Conference on Inventive Systems and Control (ICISC) · 2017
In this paper, we present a new approach of implementing DTW algorithm on FPGA for to voice recognition. Speech recognition is a technology where the computer understands the word given through speech, rather than using a keyboard. Electronics speech synthesis was developed in 1936 by AT & T, Bell's lab as a research tool. However, the first commercial voice recognition or speech recognition device dates back to 1978 when Texas Instruments introduced the first speech synthesizer in the form of children's toy. The first speech recognition software for computers was PLAINTALK by Apple Computers for Macinosh. Speech recognition is the process of finding a linguistic interpretation of a spoken utterance; typically, this means finding the sequence of words that were spoken. This involves preprocessing the acoustic signals to parameterize it in a more usable and useful form. The input signal must be matched against a stored pattern and then makes a decision of accepting or rejecting a match. No two utterances of the same word or sentence are likely to give rise to the same digital signal. This obvious point not only underlies the difficulty in speech recognition but also means that we able to extract more than just a sequence of words from the signal. When one speaks the same word, the time-length of the word changes in each time. Due to this fact, speech recognition results in error or rejection. Dynamic Time Warping algorithm effectively cures such problems. Adopting DTW algorithm, we can produce a chip having word spotting function at a low cost. We have implemented our project on FPGA which takes its place in the continuing evolution of VLSI circuit technology towards the denser and faster circuits. The complete coding for each and every module was done in VHDL. The work was carried out on Xilinx ISE 14. 1i by Xilinx Synthesis Technology and the target device used was XC 4085 XLA-07-hq304 FPGA. We evaluate the performance of system using several different test sets and observe that, DTW models presented the good results in all cases.