The Next Generation of Exascale-Class Systems: The ExaNeSt Project
Roberto Ammendola, A. Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, A. Lonardo, Michele Vittorio Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, P. Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacree, Nikolaos I. Chrysos, Manolis G. H. Katevenis · 2017
The ExaNeSt project started on December 2015 and is funded by EU H2020 research framework (call H2020-FETHPC-2014, n. 671553) to study the adoption of low-cost, Linux-based power-efficient 64-bit ARM processors clusters for Exascale-class systems. The ExaNeSt consortium pools partners with industrial and academic research expertise in storage, interconnects and applications that share a vision of an Euro-pean Exascale-class supercomputer. Their goal is designing and implementing a physical rack prototype together with its cooling system, the storage non-volatile memory (NVM) architecture and a low-latency interconnect able to test different options for interconnection and storage. Furthermore, the consortium is to provide real HPC applications to validate the system. Herein we provide a status report of the project initial developments.