Logarithmic number system addition-subtraction using fractional normalization
Giorgos Tsiaras, Vassilis Paliouras · 2017
This paper presents a technique for addition/subtraction in the Logarithmic Number System (LNS) which is based on Floating Point addition/subtraction, specifically on fractional normalization (FN). The proposed technique is analyzed and compared with two other methods for addition/subtraction using 11- and 17-bit word lengths. The results are demonstrated by evaluating complexity and performance of synthesized modules of the above addition/subtraction methods. Modules are synthesized using a 65-nm 0.9V UMC CMOS library.