A 32-channel 840Msps TDC based on Altera Cyclone III FPGA
D. N. Grigoriev, Pavel V. Kasyanenko, Е. А. Кравченко, A.G. Shamov, A. A. Talyshev · Journal of Instrumentation · 2017
In this work we present a newly developed TDC (Time-to-Digital Converter) board in the VME-32 standard. The 32-channel TDC board is based on a single FPGA Altera Cyclone III chip. The main parameters of the TDC are as follows: a resolution of 1.19 ns, a dead time of 4.76 ns, and a maximal time interval of 19 504 ns.