Reduced complexity polynomial multiplier architecture for finite fields GF(2m)
Se-Hyu Choi, Keon-Jik Lee · IEICE Electronics Express · 2017
This letter presents a low-complexity semi-systolic array implementation for polynomial multiplication over GF(2m). We consider finite field Montgomery modular multiplication (MMM) based on two-level parallel computing approach to reduce the cell delay, latency, and area-time (AT) complexity. Compared to related multipliers, the proposed scheme yields significantly lower AT complexity.