On Probability of Detection Lossless Concurrent Error Detection Based on Implications
Chih-Hao Wang, Tong-Yu Hsieh · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017
In recent years, a new concurrent error detection method by using invariant relationships inside a circuit, called implications, has been proposed. Algorithms have also been developed to reduce the total number of required implications so as to minimize the incurred area overhead due to implication checking logic. This implication reduction process, however, would result in degradation on the probability of error detection (Pdetection) of the method. In this paper, we analyze the impact of this issue mathematically together with illustration by a real case study. Our analytical results show that just one percent degradation on Pdetectionwould result in millions more errors being undetected per second and thereby significant loss on reliability of the target circuit. To address this issue, we develop a new implication reduction algorithm that guarantees no loss on Pdetection. In our algorithm, the detectability of errors for each candidate implication is carefully evaluated. The evaluation results are then utilized to select the most efficient candidates for detecting all the detectable errors. We also analyze the computation and memory complexity of the proposed algorithm. The experimental results on 28 representative benchmark circuits from ISCAS'85, ISCAS'89, and ITC'99 show that the implication reduction rate of our method (92.59%) is close to that of the previous work (95.8%). Only a small number of additional implications need to be selected to guarantee no loss on Pdetection.