FPGA implementation of Token-based Self-timed processors: A case study
Mickael Fiorentino, Yvon Savaria, Claude Thibeault · 2017
This paper describes an on-going work aiming at using FPGAs as a fast prototyping environment for Token-based Self-timed processors, inspired by the Octasic asynchronous design technique. Originally developed for Digital Signal Processing, this design technique is adapted here for an FPGA-based general purpose processor. The paper emphasizes improvements to existing FPGA implementation methodologies that address the incompatibilities between self-timed timing schemes and synchronous oriented place and route engines. It also presents a prototyping platform based on a Xilinx ZC706 board that enables functional verification, as well as runtime performance and power consumption measurements, of the reported Token-based Self-timed processor.