Statistical Analysis Based Signature Extraction Methodology for Fault Detection of Power Electronic Circuits
Moorthy Veerasamy, S. Saravanana Sundaram, R. Karthik · 2013
In this paper, statistical analysis is made use of to develop a fault dictionary. A three phase single level Voltage Source Inverter (VSI) circuit is being chosen as Circuit Under Test (CUT). The output of the CUT is subjected to wavelet transform. Based on the transform coefficients for the fault free circuit as well as simulated faults for the CUT, fault dictionary has been framed. Fault dictionary is being generated by extracting the standard deviation (from statistical analysis) of the transform coefficients. Extracted parameters are utilized to develop the fault dictionary, which is later used for fault identification. The method has been validated using a single phase multilevel inverter circuit. (V. Prasanna Moorthy, S. Saravanana Sundaran, R. Karthik. Statistical Analysis Based Signature Extraction Methodology for Fault Detection of Power Electronic Circuits. Life Sci J 2013; 10(8s): 413-420). (ISSN: 1097- 8135). http://www.lifesciencesite.com. 69