A High Performance System on Chip Bus Design and Verification
Raja Nagar · 2016
A High-Performance system-on-chip bus protocol termed the master-slave bus (MSBUS).Reduce the inevitable trade off among area, throughput and energy efficiency. The control bus is developed as a low-cost and low- power bus, and the data bus is created as a high-throughput full-duplex bus with the feature of block data transfer. To evaluate the bus performance, we create four analytical models including transfer time consumption (TC), wire efficiency (WE), valid data bandwidth (VDB) and dynamic energy efficiency.