Multicore Enabled Verification of AMBA AHB Protocol using UVM
Pragati Agarwal, M. Tech · 2016
Intel cofounder Gordon E. Moore gave the Moore's law which states that the number of transistors double every two years. This statement cannot hold indefinitely, as the size of these transistors cannot be made infinitely small. On the other hand we are also reducing the chip area, which again has a limit. Since, the amount of data being processed is increasing at a really fast pace, so is the need of managing processor execution. Also, we have a greater number of processors coming up in the market. So, in order to meet the need of the hour, we have to come up with a solution and make full utilization of these multi-core processors. For the thesis work, a protocol is being worked upon which is the AMBA(Advanced Microprocessor Bus Architecture) AHB (Advanced High-performance Bus) protocol. This protocol would be designed for a high performance pipelined system. Following this, multi-threading concepts would be introduced using two different languages i.e. System Verilog as well as VLang. Since, SV does not support multi-threading on multiple cores so, the concept of multi-threading would be introduced using VLang which is a new language. Another advantage of VLang over SV is that VLang is a free and open source language, which makes it easier to access. Parallel processing in multi-core environment is the need of the hour, and the whole thesis work revolves around this. This brings novelty to the work. Hopefully, the readers find the work worthy, would help them in contributing to further growth and development of parallel processing.